Static power dissipation is quickly becoming the main component to the overall power consumption of the modern microprocessor or integrated circuit (IC). As we reduce horizontal feature size of the transistors we also reduce the vertical feature size. Transistors are built by the vertical layering of electrically dissimilar materials with extremely low and precise geometrical tolerances at the atomic scale. Some of the vertical slices are significantly thinner than the horizontal features. The gate oxide layer which separates charge between the gate from the p and n channels of the substrate can be measured by counting atoms of thickness. As this vertical scaling continues beyond 32 nm, the electric polarization field will continue to weaken and thus the gate oxide loses the ability to separate charge. Because of this, electrons have a less restricted flow. This results in increased static power or “leakage power,” which is now becoming the dominant power loss as process technology continues to scale. Functional units (FUs) within a pipeline's execution stages account for a large percentage of the microprocessors “on chip” real-estate. The amount of leakage within a given process technology is largely proportional to the number of transistors on the die. As static leakage power dissipation continues to worsen as CMOS scaling continues, technologies that reduce or eliminate leakage power dissipation will be of paramount importance.
A general purpose computing system is typically controlled by a time multiplex operating system (OS) where programs or processes are executed by the microprocessor in a quasi-parallel manner. The OS may schedule a program for a specific duration known as a “time quantum” which may last for a duration of several million clock cycles. A computing system may have several programs or processes running from memory, where they granted a “time quantum” or turn to be ran on the microprocessor. The OS manages the execution of these programs and each program may be granted a time quantum which will be eventually interrupted by the OS by what is called a “context switch” where the operating system saves the processors register state of the current program before allowing the next program to be executed during the next time quantum.
The needs of each program running on a general purpose microprocessor are very different, as such high end microprocessors are usually designed to accommodate a broad range of different programs and applications. In many cases this results in an over design which comes in the form of an aggressive superscalar architecture that may have a large number of FUs that may be in the idle state for a significant amount of the time where they are incurring static leakage power without the benefit of real work being done.